Mini-Labs -- CSC400-Circuit Design F2011

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Mini-Lab 0: Getting to Know the CoolRunner-II Evaluation Board

  • Author: Tiffany Liu
  • Date Created: September 20, 2011

CoolRunner-II Layout

  • The following is taken from the CoolRunner-II Reference Manual:

Coolrunnerlayout.jpg

Working with First Demo Program

  1. Connect the CoolRunner-II board to the computer using the mini USB to USB cable.
  2. Start up the CoolRunner-II Utility Window:
    • Start -> All Programs -> Digilent -> Tools -> CoolRunner-II Utility Window
    • The following should appear:
      Coolrunnerutilitywindow.jpg
  3. Find the Program CoolRunner-II section at the bottom of the utility window and click on the Erase button to remove any saved program from the board. In addition, make sure the clock select jumper at JP1 is positioned over the top two pins.
  4. For this lab, we are just going to load a pre-written program onto our board. To do this, first make sure that the CoolRunner-II starter CD is inserted into the computer disc drive. Then, click the Browse button represented by ellipses
    Coolrunnerbrowse.jpg
  5. In the finder window, browse to the computer's disc drive. Once there, double click on the folder titled CRII_board_files. Then double click on the folder titled handbook_example and open the file top.jed.
  6. To load the program onto the CoolRunner-II board, click the Program button. You should see all four LEDs light up and the 4 digit segment display either counting up or down in hex.
  7. Now it's time to play around with the board:
    • Locate BTN0 and push it. What happens?
    • What do either of the two switches SW0 and SW1 do?
    • Try playing with the clock jumper and see what happens.

Notes on the Clock Circuit

  • The CoolRunner-II has a user-configurable silicon oscillator that can produce a 10 kHz, 100kHz, or 1MHz clock signal based on the position of the clock select jumper. Positioning the jumper over the top two pins produces a 10kHz clock, positioning the jumper over the bottom two pins produces a 1MHz clock, and removing the jumper produces a 100kHz clock.

Coolrunnerclock.jpg


Downloading and Installing ISE WebPACK License

  1. Go to the Xilinx website: http://www.xilinx.com
  2. Sign in with username and password or register for a new account.
  3. Go to the Licensing Solution Center: http://www.xilinx.com/support/licensing_solution_center.htm and choose Obtain a license for Purchased product. This will take you to the Xilinx Product Licensing Page.
  4. Under the Create a New License tab, choose ISE Design Suite: WebPACK License and press Generate Node-Locked License. An email containing the attached license will be sent to the email address registered to the account.
  5. Go to your email account, download the license, and save the license to an appropriate director.
  6. Open ISE Project Navigator.
  7. Go to Help --> Manage License... --> Acquire a License --> Manage Xilinx Licenses.
  8. Click on Copy License... and find the downloaded and saved license in the browser.
  9. Click on Close and now your WebPACK license has been installed.


Mini-Lab 1: Programming a Simple 4-Input Logic Circuit on the CoolRunner-II via Schematics

  • Author: Tiffany Liu
  • Date Created: October 15, 2011


Annotated Tutorial from Digilent, Inc.

  • Play around with the inputs to see when the output LED lights up.

FourInputLogicCircuitTest.jpg


  • Change the output LED by editing the UCF file. Instead of setting YT to P69, set it to a different pin.


  • Based on the Schematics for circuit2, the logic we created is YT = (AT . BT) + (CT . DT). Is this logic reflected in the CoolRunner-II? Does knowing that the push buttons, slide switches, and LEDs are active low I/Os make a difference?


Created Files

miniLab-Schematics.zip


Mini-Lab 2: Programming a Simple 4-Input Logic Circuit on the CoolRunner-II via Verilog

  • Author: Tiffany Liu
  • Date Created: October 15, 2011

Annotated Tutorial from Digilent, Inc.

  • Play around with the inputs to see when the output LED lights up.

FourInputLogicCircuitTest.jpg


  • Change the output LED by editing the UCF file. Instead of setting YT to P69, set it to a different pin.


  • Based on the Schematics for circuit2, the logic we created is YT = (AT . BT) + (CT . DT). Is this logic reflected in the CoolRunner-II? Does knowing that the push buttons, slide switches, and LEDs are active low I/Os make a difference?


Created Files

miniLab-Verilog.zip


Mini-Lab 3: Clock and Clock Dividers

  • Author: Tiffany Liu
  • Date Created: October 27, 2011


  • The user-configurable silicon oscillator on the CoolRunner-II can only produce a frequency as low as 10kHz, which is still too fast for the human eye to detect. In order to bring the frequency down, we need to send the signal through a clock divider circuit. Unfortunately the ISE Design Suite is limiting in that the available clock divider's output can only be connected to the clock of another gate. We need to be able to connect it to an I/O pin. Fortunately, however, it is relatively easy to create our own clock divider.


Divide By Two Circuit

DivideByTwoCircuit.gif

Creating Schematic File

  1. Open ISE Design Suite and create a new project.
  2. Add a new source of type Schematic to the project.
  3. Double click on the new Schematic source that was just created. Under the Symbols tab, choose Flip-flop for the category and select fd and place it into the Schematic window.
  4. Next, choose Logic for the category and select inv and choose Rotate 180 for the orientation and place the inverter into the Schematic window above the flip-flop.
  5. Connect Q to the input of the inverter and the output of the inverter to D.
  6. Add a marker to the wire leading to the clock of the flip-flop and label it clock
  7. Add a marker to the wire coming out of Q and label it div2. Your schematic should look something like the following:

DivideByTwoSchematic.png

Creating UCF File

  1. Add a new source of type Implementations Constraint File to the project.
  2. Declare a net titled clock and assign it to pin 38 (the programmable oscillator).
  3. Declare another net and title it div2 and assign it to pin 71.
NET clock     LOC = P38;
NET div2      LOC = P71;
  1. Generate programming file and load the .jed file on the CoolRunner-II via the Utility Window.
  2. To test the divider, we will use the oscilloscope. Set up the probes as follows:

OscilloscopeSetup.jpg

  1. The programmable oscillator is located to the left of the TQ-144 chip and pin 71 is located on the bottom row, 9th from the right (for a listing of TQ-144 pins, see TQ144 Pin Layout).
  2. Once the probes are set up, press Autoset on the scope. Use the cursors to measure the frequencies of the two signals.
  3. The following are screen captures taken from the scope (Blue = original clock signal, Yellow = halfed clock signal):

OriginalClockSignalFrequencyDiv2Circuit.jpg

HalfedClockSignalFrequencyDiv2Circuit.jpg

Divide By Sixteen Circuit

  • To make a divide by sixteen circuit, we just need four flip-flops. The following shows a divide by eight circuit with three flip-flops. For our divide by sixteen circuit, we would just need to add one more flip-flop onto the end and the take the output from the last flip-flop (from http://www.electronics-tutorials.ws/counter/count_1.html).

DivideBySixteenCircuit.gif

  1. Follow the steps for creating the divide by two circuit to create the divide by sixteen circuit illustrated above. The Schematic for the circuit should look something like the following:

DivideBySixteenCircuit.png

NET clock     LOC = P38;
NET div16    LOC = P71;
  1. The following are screen captures taken from the scope (Blue = original clock signal, Yellow = 1/16th of the clock signal):

OriginalClockSignalFrequencyDiv16Circuit.jpg

OneSixteenthClockSignalFrequencyDiv16Circuit.jpg

Created Files

miniLab-divideByTwo.zip
miniLab-divideBySixteen.zip